|
|
== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_hardware[<Signal Processing Hardware] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_theory[Equivalent Time Sampling - Theory>]
|
|
|
|
|
|
= Stage 1 Front-End Impedance and Capacitance Matching
|
|
|
|
|
|
This stage takes input from a connected probe and prevents the oscilloscope from putting load on the device under test.
|
|
|
If the input impedance of the oscilloscope is low, the amplitude, shape and other characteristics of the measured signal would be changed.
|
|
|
This would distort the results of the measurement. A high impedance input will also serve as a simple protection against high voltages.
|
|
|
|
|
|
{empty} +
|
|
|
|
|
|
As described in [1], a capacitive voltage divider improves the high frequency response of the input stage of the front-end.
|
|
|
This impedance or capacitance input stage is also called a compensated attenuator. +
|
|
|
The input signal, in connection with the OpenLab front-end, is attenuated by the factor of 2.
|
|
|
This will improve the general voltage input range of the OpenLab oscilloscope.
|
|
|
As an additional protection against voltages above the rated oscilloscope specifications, two diodes (D6) clamp the voltage if leaving the allowed range between +5V and -5V [2].
|
|
|
|
|
|
{empty} +
|
|
|
|
|
|
Figure 1 shows the segment of the front-end schematic which includes the first stage.
|
|
|
|
|
|
image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/sig_proc_osci_hardware/sig_proc_osci_hardware_stage1.PNG[caption="Figure 1: ",title="Schematic of stage 1 of the OpenLab oscilloscope front-end",align="center"]
|
|
|
|
|
|
{empty} +
|
|
|
|
|
|
To fulfill the standard input-coupling function of a modern oscilloscope, the signal path can be switched between DC and AC coupling (SW1).
|
|
|
In DC coupling-mode the measured signal is directly connected to the impedance/capacitance divider.
|
|
|
This allows the user of the oscilloscope to measure AC and DC components of the signal. Switching to AC coupling, the signal is fed through a capacitor.
|
|
|
This capacitor filters only the DC components of the signal. This ensures that the oscilloscope only displays the AC part of the signal.
|
|
|
|
|
|
{empty} +
|
|
|
|
|
|
Figure 2 shows the output of stage 1 in relation to a test input signal. It is a sinusoidal signal with a frequency of 1kHz and a amplitude of 5V.
|
|
|
Stage 1 is directly connected to the simulated oscilloscope probe.
|
|
|
|
|
|
{empty} +
|
|
|
|
|
|
image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/sig_proc_osci_hardware/sig_proc_osci_hardware_stage1_ltspice.PNG[caption="Figure 2: ",title="Relation between IN and OUT of stage 1. The test signal is a 5V 1kHz sine",align="center"]
|
|
|
|
|
|
{empty} +
|
|
|
|
|
|
The waveform drawn in red represents the input of stage 1. The output is shown by the blue signal.
|
|
|
Because of the characteristics of the simulated probe, the test signal gets attenuated by a factor of 10. This exactly simulates the behavior of a real 10:1 oscilloscope probe.
|
|
|
|
|
|
{empty} +
|
|
|
|
|
|
== Bibliography
|
|
|
|
|
|
. KALSI, H.: _Electronic Instrumentation_, vol. 2. Tata McGraw-Hill Publishing Company, 1995
|
|
|
. STEFAN SALEWSKI: _Digitales Speicher-Oszilloskop (DSO)_ [Online] http://www.ssalewski.de/DSO.html.de[Homepage of Stefan Salewski]
|
|
|
|
|
|
{empty} +
|
|
|
|
|
|
== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_hardware[<Signal Processing Hardware] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_theory[Equivalent Time Sampling - Theory>] |