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== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/board_TIVAC[<Microcontroller-based TIVAC] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_osci_hardware[Signal Processing Front-End (XMC,TIVAC,DE0-Oscilloscope)>]
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= Protocol Interpreter and Reply Generator
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The protocol interpreter of the FPGA design is responsible for interpreting data sent by the OpenLab GUI.
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It also generates reply messages to communicate the status of the FPGA or to transfer the requested sample data.
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Another function of this entity is the controlling of other parts of the FPGA design.
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The following sub-chapters will describe the functionality of the OpenLab communication protocol and how the interpreter component of the FPGA was implemented.
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== OpenLab communication protocol
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The interpreter is based on the communication protocol described in [21]. This protocol standardises the way of communication between a OpenLab device and the OpenLab GUI.
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This ensures that the OpenLab GUI is able to connect to, and communicate with, any OpenLab device. Regardless if it is microcontroller-based, FPGA-based or soundcard-based.
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The protocol was written from the OpenLab device perspective. This means that every command that is declared by the protocol is sent by the GUI.
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On the other hand, every reply is sent from the OpenLab device. Two versions of the OpenLab communication protocol are described by [21].
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The first one is human readable and therefore called ASCII protocol. Every command and reply is sent entirely in ASCII format.
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This enables the user to debug the communication using terminal programs.
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The ASCII protocol was only used during the first phase of the OpenLab project to get a better understanding for setting up a reliable protocol and debugging sample data.
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The second protocol, called the binary protocol, is a much improved version and is currently used at the OpenLab project.
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By transferring the data in the binary format the overhead of each message is drastically reduced, leading to much faster processing at the GUI and the OpenLab devices.
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It features, unlike the ASCII protocol, error detection capabilities. With the usage of the CRC16 algorithm, errors during transmission can be detected.
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This is necessary to detect bad sample data before the sample is displayed on the graph of the GUI.
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Table 1 shows the layout of the binary protocol, including the command- and reply structure.
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image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/OpenLab_osci_FPGA_imp/osci_FPGA_imp_binarytable.PNG[caption="Figure 1: ",title="Binary-Mode command- and reply-structure, modified [21]",align="center"]
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== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/board_TIVAC[<Microcontroller-based TIVAC] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_osci_hardware[Signal Processing Front-End (XMC,TIVAC,DE0-Oscilloscope)>] |
Patrick Schmitt