--------------------------------------------------------------------------------
-- Fault InJection Instrumenter (FIJI)
-- https://embsys.technikum-wien.at/projects/vecs/fiji
--
-- The creation of this file has been supported by the publicly funded
-- R&D project Josef Ressel Center for Verification of Embedded Computing
-- Systems (VECS) managed by the Christian Doppler Gesellschaft (CDG).
--
-- Authors:
-- Christian Fibich <fibich@technikum-wien.at>
-- Stefan Tauner <tauner@technikum-wien.at>
--
-- Copyright and related rights are licensed under the Solderpad Hardware
-- License, Version 0.51 (the "License"); you may not use this file except
-- in compliance with the License. You may obtain a copy of the License at
-- http://solderpad.org/licenses/SHL-0.51. Unless required by applicable
-- law or agreed to in writing, software, hardware and materials
-- distributed under this License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either expressed or
-- implied. See the License for the specific language governing
-- permissions and limitations under the License.
--
-- See the LICENSE file for more details.
--
-- Description:
--  TMR_VGA package file
--------------------------------------------------------------------------------


library ieee;
    use ieee.std_logic_1164.all;
    use ieee.numeric_std.all;

package spriteflyer_pkg is

    constant C_HFP            : natural := 16;
    constant C_HSYNC          : natural := 96;
    constant C_HVISIBLE       : natural := 640;
    constant C_HBP            : natural := 48;
    constant C_HVISIBLE_START : natural := C_HBP+C_HSYNC;
    constant C_VFP            : natural := 10;
    constant C_VSYNC          : natural := 2;
    constant C_VVISIBLE       : natural := 480;
    constant C_VBP            : natural := 33;
    constant C_VVISIBLE_START : natural := C_VBP+C_VSYNC;

    component spriteflyer_voter is
        generic (
            G_WIDTH : natural
        );
        port (
            s_en_i   : in std_logic;
            s_data_i : in std_logic_vector(3*G_WIDTH-1 downto 0);
            s_data_o : out std_logic_vector(G_WIDTH-1 downto 0);
            s_err_o  : out std_logic
        );
    end component spriteflyer_voter;

    component spriteflyer_input_sync_debounce is
        generic (
            G_CLK_FREQUENCY : natural
        );
        port (
            s_clk_i       : in  std_logic;
            s_reset_n_i   : in  std_logic;
            s_data_i      : in  std_logic;
            s_data_sync_o : out std_logic;
            s_data_deb_o  : out std_logic
        );
    end component spriteflyer_input_sync_debounce;

    component spriteflyer_vga is
        generic (
            G_HSYNC_ACT   : std_logic;
            G_VSYNC_ACT   : std_logic
        );
        port (
            s_clk_i         : in std_logic;
            s_reset_n_i        : in std_logic;
            s_ce25_i           : in std_logic;
            s_line_count_o     : out unsigned (9 downto 0);
            s_column_count_o   : out unsigned (9 downto 0);
            s_blank_o          : out std_logic;
            s_image_finished_o : out std_logic;
            s_hsync_o          : out std_logic;
            s_vsync_o          : out std_logic
        );
    end component spriteflyer_vga;

    component spriteflyer_sprite
         generic (
              G_RED_WIDTH   : natural;
              G_GREEN_WIDTH : natural;
              G_BLUE_WIDTH  : natural
          );
        port (
            s_clk_i   : in std_logic;
            s_reset_n_i  : in std_logic;
            s_ce25_i            : in std_logic;
            s_column_count_i    : in unsigned(9 downto 0);
            s_line_count_i      : in unsigned(9 downto 0);
            s_blank_i           : in std_logic;
            s_image_finished_i  : in std_logic;
            s_red_o      : out std_logic_vector(G_RED_WIDTH-1 downto 0);
            s_green_o    : out std_logic_vector(G_GREEN_WIDTH-1 downto 0);
            s_blue_o     : out std_logic_vector(G_BLUE_WIDTH-1 downto 0)
        );
    end component spriteflyer_sprite;

    component spriteflyer_clkgen is
        port (
            s_clk_i     : in std_logic;
            s_reset_x_i : in std_logic;
            s_clk_o  : out std_logic;
            s_ce25_o    : out std_logic;
            s_reset_n_o : out std_logic
        );
    end component spriteflyer_clkgen;

end package spriteflyer_pkg;