Commit e148471b authored by Christian Fibich's avatar Christian Fibich Committed by Stefan Tauner
Browse files

Improved the TMR VGA documentation, added screenshot

parent 36e12e41
......@@ -4,9 +4,18 @@
The \ac{TMR} \ac{VGA} demo design is intended to demonstrate the effects of fault injection in an TMR
A sprite engine draws a sprite of a small airplane on the screen in front
of a blue background. The sprite of the airplane is moved across the
of a blue-red gradient background. The sprite of the airplane is moved across the
screen in successive frames, changing direction when it reaches any of
the visible screen borders.
the visible screen borders. A screenshot can be seen in Figure~\ref{fig:tmrvga_screenshot}.
The left side shows the error-free case, a stuck-open error in the sprite
engine can be seen on the right side.
\begin{figure}[htb]
\centering
\includegraphics[width=0.8\linewidth]{img/tmrvga_screenshot.jpg}
\caption{\ac{TMR} \ac{VGA} Screenshot}
\label{fig:tmrvga_screenshot}
\end{figure}
The use case is designated for use with the Cyclone III-based DE0 development
board from Terasic\footnote{\url{http://de0.terasic.com.tw/}, visited on August 29,2016}
......@@ -25,6 +34,7 @@ HSync and VSync signals as well as the row and column in the current frame.
The output of the sprite engine is the color of the current pixel, blanked in the non-visible area of the \ac{VGA} timing.
This sprite engine is triplicated, as an analogy to triplicated avionics in an actual airplane.
Majority voting is performed over the three color channels before outputting the color value to a parallel \ac{DAC}.
The voters are also able to determine if a 2:1 mismatch has occurred.
A coarse block diagram of the design can be seen in \Cref{fig:tmrvga}.
An important thing to note is that the sprite position registers within the sprite engines are not converged using majority voting.
......@@ -33,8 +43,6 @@ In a real-world design the states of the redundant units would usually be determ
\subsection{Hardware Setup}
\fixme{documente "TMR enable button" und LEDs; und Power \& VGA zumindest erwähnen :)}
Board setup (DE0):
\begin{itemize}
\item Connect a 3V3 Serial TTL cable to the DE0:
......@@ -48,6 +56,16 @@ Board setup (DE0):
\item If your cable requires an I/O voltage input (e.g., FTDI TTL-232R-VIP),
connect the correspondig wire to any 3V3 pin on GPIO1 (e.g., J5.29)
\end{itemize}
\item Connect a VGA-compatible monitor to the VGA port. The design
generates a 640x480 \@ 25Mhz VGA signal.
\item The dip-switch SW0 controls if TMR is enabled.
\item BUTTON0 resets the design
\item The green LEDs above the three buttons (LEDG0-LEDG3) show the
error detection state:
\begin{itemize}
\item LEDG0 shows if any error has been detected
\item LEDG1-3 show which voter (Red,Green,Blue) detected the error
\end{itemize}
\end{itemize}
Board setup (Zybo):
......@@ -63,6 +81,15 @@ Board setup (Zybo):
\item If your cable requires an I/O voltage input (e.g., FTDI TTL-232R-VIP),
connect the correspondig wire to PMOD JE6
\end{itemize}
\item Connect a VGA-compatible monitor to the VGA port.
\item The dip-switch SW0 controls if TMR is enabled.
\item BTN0 resets the design when pressed
\item The LEDs above the dip switches (LD0-LD3) show the
error detection state:
\begin{itemize}
\item LD0 shows if any error has been detected
\item LD1-3 show which voter (Red,Green,Blue) detected the error
\end{itemize}
\end{itemize}
\subsection{Work Flow}
......
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