Commit bb89fae4 authored by Christian Fibich's avatar Christian Fibich Committed by Stefan Tauner
Browse files

Extended download and instrument scripts

Added demo file for download
parent b5a885b1
......@@ -173,6 +173,7 @@ BEGIN {
description => "Duration for FIJI-to-DUT reset",
ini_name => "RESET_DUT_IN_DURATION",
type => 'natural',
default => 1,
unit => 'cycles',
values => sub {
my $val = shift;
......@@ -238,13 +239,13 @@ BEGIN {
},
FAULT_DETECT_1_EN => {
description => "Enable fault-detect bit 1",
ini_name => "FAULT_DETECT_1_'EN",
ini_name => "FAULT_DETECT_1_EN",
type => 'boolean',
default => 0,
},
FAULT_DETECT_2_EN => {
description => "Enable fault-detect bit 2",
ini_name => "FAULT_DETECT_2_'EN",
ini_name => "FAULT_DETECT_2_EN",
type => 'boolean',
default => 0,
},
......
......@@ -70,6 +70,7 @@ $FIJI_DEFAULTS{'FIJI_WRAPPER_RESET_TO_DUT_SIGNAL_NAME'} = "s_fiji_reset_to_dut";
$FIJI_DEFAULTS{'FIJI_WRAPPER_RESET_EXT_SIGNAL_NAME'} = "s_fiji_reset_ext";
$FIJI_DEFAULTS{'FIJI_TRIGGER_EXT_ASSIGNMENT'} = "not(c_trigger_ext_active)";
$FIJI_DEFAULTS{'FIJI_RESET_EXT_ASSIGNMENT'} = "not(c_reset_ext_active)";
$FIJI_DEFAULTS{'RESET_EXT_IN_NAME'} = "s_fiji_reset";
## @function generate_config_package ($fiji_settings_filename, $vhdl_filename)
# @brief Generate a public_config_pkg VHDL package file for FIJI
......@@ -120,7 +121,7 @@ END_FIU
my $vhdl_id = sprintf("X\"%04x\"",$fiji_consts->{'ID'});
my $gentime = localtime;
my $reset_dut_in_duration = ($fiji_consts->{'RESET_DUT_IN_EN'} eq 1) ? $fiji_consts->{'RESET_DUT_IN_DURATION'} : 0;
my $reset_dut_in_duration = ($fiji_consts->{'RESET_DUT_IN_EN'} eq 1) ? $fiji_consts->{'RESET_DUT_IN_DURATION'} : 1;
$logger->debug(sprintf("Generating VHDL text.\n"));
......@@ -184,7 +185,7 @@ package public_config_pkg is
constant c_reset_dut_in_duration : positive := $reset_dut_in_duration;
-- external reset signal: active level
constant c_reset_ext_active : std_logic := '$fiji_consts->{'TRIGGER_EXT_ACTIVE'}';
constant c_reset_ext_active : std_logic := '$fiji_consts->{'RESET_EXT_ACTIVE'}';
-- DUT -> FIC reset signal: active level
constant c_reset_dut_out_active : std_logic := '$fiji_consts->{'RESET_DUT_OUT_ACTIVE'}';
......@@ -305,9 +306,9 @@ sub generate_wrapper_module ($) {
if ($fiji_consts->{'RESET_EXT_EN'}) {
my $re_base = (defined $fiji_consts->{'RESET_EXT_IN_NAME'}) ? $fiji_consts->{'RESET_EXT_IN_NAME'} : $FIJI_DEFAULTS{'RESET_EXT_IN_NAME'};
my $re_suffix = ($fiji_consts->{'RESET_EXT_ACTIVE'} == 0) ? "n" : "";
my $re_suffix = ($fiji_consts->{'RESET_EXT_ACTIVE'} == 0) ? "_n" : "";
push @ext_ports,$re_base.$re_suffix."_i : in std_logic";
$trigger_ext_assignment = $re_base.$re_suffix."_i";
$reset_ext_assignment = $re_base.$re_suffix."_i";
}
if ($fiji_consts->{'TRIGGER_EXT_EN'}) {
my $te_base = (defined $fiji_consts->{'TRIGGER_EXT_IN_NAME'}) ? $fiji_consts->{'TRIGGER_EXT_IN_NAME'} : $FIJI_DEFAULTS{'TRIGGER_EXT_IN_NAME'};
......@@ -416,7 +417,7 @@ architecture wrap of $wrapper_name is
signal $fiji_trigger_ext_signal_name : std_logic;
signal $fiji_reset_ext_signal_name : std_logic;
signal $fiji_clock_signal_name : std_logic;
signal $fiji_reset_from_dut_signal_name : std_logic := not(c_reset_dut_in_active);
signal $fiji_reset_from_dut_signal_name : std_logic := not(c_reset_dut_out_active);
signal $fiji_reset_to_dut_signal_name : std_logic;
signal $fiji_trigger_from_dut_signal_name : std_logic := not(c_trigger_dut_active);
signal $fiji_fault_detection_signal_name : std_logic_vector(c_num_fault_detect_nets-1 downto 0) := (others => '0');
......
; Config::Simple 4.58
; Mon Jun 15 15:26:09 2015
; Mon Jun 15 15:26:18 2015
[FIU0]
[FIU1]
LFSR_MASK=0x0
FAULT_MODEL=RUNTIME
NET_NAME=i2c_master_top|i2c_master_byte_ctrl|i2c_master_bit_ctrl|c_state_ns_0_0__g0_0_0
[FIU0]
FAULT_MODEL=RUNTIME
LFSR_MASK=0x0
NET_NAME=i2c_master_top|i2c_master_byte_ctrl|i2c_master_bit_ctrl|N_152_tz
[CONSTS]
RESET_DUT_OUT_NAME=i2c_master_top|i2c_master_byte_ctrl|c_state_ns_0_0_0_5__g1
RESET_DUT_IN_EN=1
FAULT_DETECT_2_'EN=1
TRIGGER_DUT_NAME=i2c_master_top|cnt_RNIOCS1_combout
FAULT_DETECT_1_'EN=1
CLOCK_NET=i2c_master_top|wb_clk_i_c
FAULT_DETECT_1_NAME=i2c_master_top|i2c_master_byte_ctrl|N_11_i
TIMER_WIDTH=4
RESET_EXT_ACTIVE=1
FAULT_DETECT_2_EN=1
TRIGGER_DUT_EN=1
FIU_CFG_BITS=3
RESET_DUT_IN_DURATION=4
FREQUENCY=50000000
RESET_DUT_IN_NAME=wb_rst_i
LFSR_SEED=0xcafe
RESET_DUT_OUT_EN=1
FAULT_DETECT_2_INVERT=1
TRIGGER_EXT_EN=0
FIU_NUM=2
TIMER_WIDTH=4
BAUDRATE=115200
RESET_DUT_IN_ACTIVE=1
RESET_DUT_IN_NAME=wb_rst_i
RESET_EXT_EN=0
FREQUENCY=50000000
TRIGGER_EXT_ACTIVE=1
RESET_DUT_OUT_ACTIVE=0
CFGS_PER_MSG=2
TRIGGER_DUT_ACTIVE=1
FIU_CFG_BITS=3
RESET_DUT_IN_ACTIVE=1
RESET_DUT_OUT_NAME=i2c_master_top|i2c_master_byte_ctrl|c_state_ns_0_0_0_5__g1
FAULT_DETECT_1_INVERT=0
FAULT_DETECT_1_NAME=i2c_master_top|i2c_master_byte_ctrl|N_11_i
RESET_DUT_IN_DURATION=4
LFSR_WIDTH=16
TRIGGER_DUT_ACTIVE=1
LFSR_POLY=0x2d
RESET_EXT_ACTIVE=1
LFSR_WIDTH=16
ID=0xaa4
CFGS_PER_MSG=2
FAULT_DETECT_1_EN=1
FAULT_DETECT_2_NAME=i2c_master_top|i2c_master_byte_ctrl|N_70
TRIGGER_DUT_EN=1
[FIU1]
NET_NAME=i2c_master_top|i2c_master_byte_ctrl|i2c_master_bit_ctrl|c_state_ns_0_0__g0_0_0
LFSR_MASK=0x0
FAULT_MODEL=RUNTIME
RESET_EXT_EN=0
BAUDRATE=115200
RESET_DUT_OUT_ACTIVE=0
CLOCK_NET=i2c_master_top|wb_clk_i_c
RESET_DUT_IN_EN=1
FAULT_DETECT_2_INVERT=1
RESET_DUT_OUT_EN=1
TRIGGER_DUT_NAME=i2c_master_top|cnt_RNIOCS1_combout
[cli]
uart=/dev/ttyUSB0
fiji_cfg=fiji.cfg
; Config::Simple 4.58
; Thu Jun 11 14:56:45 2015
[TEST2]
TIMER_VALUE_1=0
TIMER_VALUE_2=0
FIU_0_PATTERN_1=STUCK_AT_0
FIU_0_PATTERN_2=STUCK_AT_0
FIU_1_PATTERN_1=STUCK_AT_0
FIU_1_PATTERN_2=STUCK_AT_0
RESET_DUT_AFTER_CONFIG=1
TRIGGER=NONE
[TEST0]
TIMER_VALUE_1=0
TIMER_VALUE_2=0
FIU_0_PATTERN_1=NONE
FIU_0_PATTERN_2=NONE
FIU_1_PATTERN_1=NONE
FIU_1_PATTERN_2=NONE
RESET_DUT_AFTER_CONFIG=1
TRIGGER=NONE
[CONSTS]
HALT_ON_UNDERRUN=1
REPEAT=1
FIJI_CFG=fiji.cfg
HALT_ON_ID_ERROR=1
HALT_ON_UART_ERROR=1
HALT_ON_FAULT_DETECT=1
NUM_TESTS=4
REPEAT_OFFSET=1
UART=/dev/ttyUSB0
HALT_ON_CRC_ERROR=1
[TEST1]
TIMER_VALUE_1=0
TIMER_VALUE_2=0
FIU_0_PATTERN_1=STUCK_AT_1
FIU_0_PATTERN_2=STUCK_AT_1
FIU_1_PATTERN_1=STUCK_AT_1
FIU_1_PATTERN_2=STUCK_AT_1
RESET_DUT_AFTER_CONFIG=1
TRIGGER=NONE
[TEST3]
TIMER_VALUE_1=0
TIMER_VALUE_2=0
FIU_0_PATTERN_1=NONE
FIU_0_PATTERN_2=NONE
FIU_1_PATTERN_1=NONE
FIU_1_PATTERN_2=NONE
RESET_DUT_AFTER_CONFIG=1
TRIGGER=NONE
......@@ -35,7 +35,7 @@ sub test_fi_uart {
reset => $reset,
consts => $fiji_consts,
);
$port->send_config( \%config, 1000, 0, 1 );
return $port->send_config( \%config, 1000, 0, 1 );
}
sub main {
......@@ -52,12 +52,12 @@ sub main {
if ( !defined $mode || !defined $cfgname ) {
print $USAGE;
return -1;
return 1;
}
my $fiji_tests = FIJI::Tests->new( $mode, $cfgname );
if ( !ref($fiji_tests) ) {
printf( $fiji_tests . " Aborting.\n" );
logger->error( $fiji_tests . " Aborting.\n" );
return 1;
}
......@@ -74,9 +74,10 @@ sub main {
$rv = _manual($fiji_tests->{'ext'}->{'global_settings'}->{'design'},$port);
}
$logger->error($rv) if ( defined $rv );
if(defined $rv && !ref($rv)) {
$logger->error($rv);
}
printf "\n";
$logger->trace("=== Stopping execution ===");
return 0;
}
......@@ -90,6 +91,8 @@ sub _auto {
$fiji_tests->{'ext'}->{'global_settings'}->{'design'};
my $toff = 0;
my $ri = 0;
my $halt;
$logger->info("Downloading in auto mode.");
......@@ -159,55 +162,45 @@ sub _auto {
$logger->debug(
sprintf( "reset is %sabled.", $reset == 0 ? "dis" : "en" ) );
if (
test_fi_uart(
my $recv_msg = test_fi_uart(
$port, \@payload, $t1_duration,
$t2_duration, $trigger_en, $trigger_ext,
$reset, $fiji_design_consts
) != 0
)
{
$msg = "UART transaction failed.";
$reset, $fiji_design_consts);
# last;
if(ref($recv_msg) ne "HASH") {
$msg = "UART transaction failed.";
return $msg;
}
#TODO: get return message
my $type = "READY";
my $u = 0;
my $i = 0;
my $c = 0;
$halt = 0;
my @e = ( 0, 0 );
my $halt = 0;
if ( $type eq "UNDERRUN" ) {
if ( $recv_msg->{'msg_type'} eq "UNDERRUN" ) {
$logger->info( "UNDERRUN message received. HALT_ON_UNDERRUN = "
. $fiji_tests->{'design'}->{'HALT_ON_UNDERRUN'}
. "." );
$halt |= $fiji_tests->{'design'}->{'HALT_ON_UNDERRUN'};
}
if ( $u == 1 ) {
if ( $recv_msg->{'error'}->{'U'}) {
$logger->info( "UART error. HALT_ON_UART_ERROR = "
. $fiji_tests->{'design'}->{'HALT_ON_UART_ERROR'}
. "." );
$halt |= $fiji_tests->{'design'}->{'HALT_ON_UART_ERROR'};
}
if ( $i == 1 ) {
if ( $recv_msg->{'error'}->{'I'}) {
$logger->info( "ID error. HALT_ON_ID_ERROR = "
. $fiji_tests->{'design'}->{'HALT_ON_ID_ERROR'}
. "." );
$halt |= $fiji_tests->{'design'}->{'HALT_ON_ID_ERROR'};
}
if ( $c == 1 ) {
$logger->info( "CRC error. HALT_ON_ID_ERROR = "
if ( $recv_msg->{'error'}->{'C'}) {
$logger->info( "CRC error. HALT_ON_CRC_ERROR = "
. $fiji_tests->{'design'}->{'HALT_ON_CRC_ERROR'}
. "." );
$halt |= $fiji_tests->{'design'}->{'HALT_ON_CRC_ERROR'};
}
for my $ei ( 0 .. $#e ) {
if ( $e[$ei] == 1 ) {
for my $ei ( 0 .. 1 ) {
if ( $recv_msg->{'fault_detect'}->{$ei} ) {
$logger->info(
"FAULT detected (Bit $ei). HALT_ON_FAULT_DETECT = "
. $fiji_tests->{'design'}->{'HALT_ON_FAULT_DETECT'}
......@@ -217,8 +210,10 @@ sub _auto {
}
if ( $halt == 1 ) {
$msg = "Halt because of HALT_ON_xxx. Failed test: $ti.";
last;
$msg = "Halt because of HALT_ON_xxx. Failed test: $ti, repetition $ri.";
#FIXME remove the following line
system("/usr/bin/aplay lib/error.wav");
return $msg;
}
}
......@@ -227,8 +222,8 @@ sub _auto {
} else {
$toff = $fiji_tests->{'design'}->{'REPEAT_OFFSET'};
$logger->info("Repeat tests beginning with $toff.");
$ri++;
}
}
return $msg;
}
......@@ -332,13 +327,12 @@ sub _manual {
$logger->debug(
sprintf( "reset is %sabled.", $reset == 0 ? "dis" : "en" ) );
if (
test_fi_uart(
$port, \@payload, $t1_duration, $t2_duration,
$trigger_en, $trigger_ext, $reset, $fiji_design_consts
) != 0
)
{
my $recv_msg = test_fi_uart(
$port, \@payload, $t1_duration,
$t2_duration, $trigger_en, $trigger_ext,
$reset, $fiji_design_consts);
if(ref($recv_msg) ne "HASH") {
$msg = "UART transaction failed.";
last;
}
......
......@@ -5,7 +5,7 @@ use warnings;
use Log::Log4perl qw(get_logger);
use Clone qw(clone);
use Digest::MD5 qw(md5_hex);
use Digest::CRC qw(crcccitt);
use FIJI::Settings;
......@@ -15,13 +15,12 @@ use FIJI::VHDL;
use Getopt::Long;
sub main {
my $logger = get_logger();
my ($options) = @_;
my $msg;
my $rv;
my %hash;
my $self = bless(\%hash);
......@@ -56,14 +55,14 @@ sub main {
if(ref($net_ref) ne "HASH") {
$logger->error($net_ref);
return 0;
return 1;
}
my $ret = $nl->instrument_net($net_ref->{'net'},$fiu_idx);
if($ret) {
$logger->error($ret);
return 0;
return 1;
}
}
......@@ -74,13 +73,13 @@ sub main {
if(ref($net_ref) ne "HASH") {
$logger->error($net_ref);
return 0;
return 1;
}
my $ret = $nl->net_add_function($net_ref->{'net'},FIJI::VHDL->FIJI_PORTTYPE_CLOCK,"clock_from_dut_o");
if($ret) {
$logger->error($ret);
return 0;
return 1;
}
# Reset from DUT if enabled
......@@ -91,13 +90,13 @@ sub main {
if(ref($net_ref) ne "HASH") {
$logger->error($net_ref);
return 0;
return 1;
}
my $ret = $nl->net_add_function($net_ref->{'net'},FIJI::VHDL->FIJI_PORTTYPE_RESET_FROM_DUT,"reset_from_dut_o");
if($ret) {
$logger->error($ret);
return 0;
return 1;
}
}
......@@ -110,7 +109,7 @@ sub main {
if (!defined $mod) {
$msg = "Could not find module '".$options->{'toplevel_module'}."'\n";
$logger->error($msg);
return 0;
return 1;
}
my $port = $mod->find_port($settings_ref->{'design'}->{'RESET_DUT_IN_NAME'});
......@@ -118,7 +117,7 @@ sub main {
if (!defined $port) {
$msg = "Could not find port '".$mod->name."|".$settings_ref->{'design'}->{'RESET_DUT_IN_NAME'}."'\n";
$logger->error($msg);
return 0;
return 1;
}
$port->userdata(FIJI::VHDL->FIJI_USERDATA_PORTTYPE,FIJI::VHDL->FIJI_PORTTYPE_RESET_TO_DUT);
......@@ -133,13 +132,13 @@ sub main {
if(ref($net_ref) ne "HASH") {
$logger->error($net_ref);
return 0;
return 1;
}
my $ret = $nl->net_add_function($net_ref->{'net'},FIJI::VHDL->FIJI_PORTTYPE_TRIGGER_FROM_DUT,"trigger_from_dut_o");
if($ret) {
$logger->error($ret);
return 0;
return 1;
}
}
......@@ -151,13 +150,13 @@ sub main {
if(ref($net_ref) ne "HASH") {
$logger->error($net_ref);
return 0;
return 1;
}
my $ret = $nl->net_add_function($net_ref->{'net'},FIJI::VHDL->FIJI_PORTTYPE_FAULT_DETECTION,"fault_detect_1_o",0);
if($ret) {
$logger->error($ret);
return 0;
return 1;
}
}
......@@ -169,26 +168,53 @@ sub main {
if(ref($net_ref) ne "HASH") {
$logger->error($net_ref);
return 0;
return 1;
}
my $ret = $nl->net_add_function($net_ref->{'net'},FIJI::VHDL->FIJI_PORTTYPE_FAULT_DETECTION,"fault_detect_2_o",1);
if($ret) {
$logger->error($ret);
return 0;
return 1;
}
}
# TODO: Reset to DUT
#
# calculate design ID
# Design ID = CRC-CCITT of all input data:
# - input netlist (file content)
# - input settings file (file content)
# - toplevel module name
# - file prefix
#
# FIXME: OK generating the ID like this?
#
my $ctx = Digest::MD5->new;
$ctx->add($nl->{'nl'});
my $id = hex substr($ctx->hexdigest, -4);
$id &= 0xFFFF;
my $ctx = Digest::CRC->new(type=>"crcccitt");
open (my $fh, "<", $netlist_filename);
if(!defined $fh) {
$logger->error($!);
return 1;
}
$ctx->addfile($fh);
close($fh);
open ($fh, "<", $options->{'fiji_settings_file'});
if(!defined $fh) {
$logger->error($!);
return 1;
}
$ctx->addfile($fh);
close($fh);
$ctx->add($options->{'toplevel_module'});
$ctx->add($options->{'file_prefix'});
my $id = hex $ctx->hexdigest;
$logger->info(sprintf("Design ID chosen to be 0x%04X.",$id));
#
......@@ -199,24 +225,15 @@ sub main {
$settings_ref->save($options->{'file_prefix'}."_download.cfg");
#
# output netlis
# FIXME we have to order the "defparam" statements for Quartus:
# must be immediately next to the cell they refer to
# output netlist
#
my $fiji_netlist_filename = $options->{'file_prefix'}."_instrumented.vqm";
open(my $fh_nl, ">", $fiji_netlist_filename);
if(!defined $fh_nl) {
$logger->error("Cannot open file $fiji_netlist_filename: $!");
}
print $fh_nl "//------------------------------------------------------------------------------\n";
print $fh_nl "// FIJI instrumented netlist\n";
print $fh_nl "// Generated ".localtime()." by $0\n";
print $fh_nl "// Netlist ID: 0x".sprintf("%04x",$id)."\n";
print $fh_nl "//------------------------------------------------------------------------------\n";
$rv = $nl->export($options->{'file_prefix'}."_instrumented.vqm",$id);
print $fh_nl $nl->{'nl'}->verilog_text;
close($fh_nl);
if(defined $rv) {
$logger->error($rv);
return 1;
}
#
# Make wrapper
......@@ -227,11 +244,11 @@ sub main {
$wrapper_config->{'fiji_settings_filename'} = $options->{'file_prefix'}."_download.cfg"; #$options->{'fiji_settings_file'};
$wrapper_config->{'vhdl_filename'} = $options->{'file_prefix'}."_wrapper.vhd";
my $rv = FIJI::VHDL->generate_wrapper_module($wrapper_config);
$rv = FIJI::VHDL->generate_wrapper_module($wrapper_config);
if(defined $rv) {
$logger->error($rv);
return 0;
return 1;
}
#
......@@ -241,11 +258,11 @@ sub main {
if(defined $rv) {
$logger->error($rv);
return 0;
return 1;
}
$logger->trace("=== Stopping execution ===");
return 1;
return 0;
}
......
; Config::Simple 4.58
; Thu Jun 11 14:56:45 2015
[TEST2]
TIMER_VALUE_1=0
FIU_0_PATTERN_1=NONE
RESET_DUT_AFTER_CONFIG=0
TIMER_VALUE_2=0
TRIGGER=NONE
FIU_0_PATTERN_2=NONE
[TEST0]
TIMER_VALUE_2=0
RESET_DUT_AFTER_CONFIG=1
FIU_0_PATTERN_1=NONE
TIMER_VALUE_1=0
FIU_0_PATTERN_2=NONE
TRIGGER=NONE
[CONSTS]
HALT_ON_UNDERRUN=1
REPEAT=1
FIJI_CFG=fiji.cfg
HALT_ON_ID_ERROR=1
HALT_ON_UART_ERROR=1
HALT_ON_FAULT_DETECT=1
NUM_TESTS=4
REPEAT_OFFSET=1
UART=/dev/ttyUSB0
HALT_ON_CRC_ERROR=1
[TEST1]
TRIGGER=NONE
FIU_0_PATTERN_2=NONE
TIMER_VALUE_1=0
RESET_DUT_AFTER_CONFIG=0
TIMER_VALUE_2=0
FIU_0_PATTERN_1=NONE