Commit 9292b339 authored by Stefan Tauner's avatar Stefan Tauner
Browse files

Add support for concatenations in pins and for sized constant numbers

parent 379348a8
......@@ -348,8 +348,7 @@ sub _add_port_to_hierarchy {
);
# let verilog-perl find the net and port.
# @FIXME sufficient to link "mod" here?
$mod->link;
$startmod->link;
_add_port_to_hierarchy($mod, $name, $function, $index, $indent);
}
}
......@@ -1070,8 +1069,14 @@ sub _get_net_connections {
# find nets driven by other cells' output pins as well as nets driving other cells' input pins
foreach my $cell ($mod->cells) {
foreach my $pin ($cell->pins) {
my $bit_offset_total = 0;
foreach my $netname (@{$pin->netnames}) {
if ($netname->{'netname'} eq $net_name && (_offset_of_bit_in_range($bit, $netname->{'msb'}, $netname->{'lsb'}) != -1)) {
my $bit_offset_range = _offset_of_bit_in_range($bit, $netname->{'msb'}, $netname->{'lsb'});
if ($netname->{'netname'} eq $net_name && ($bit_offset_range != -1)) {
# Remember the bit's offset
if(defined($netname->{'msb'})) {
$pin->userdata('fiji_driver_bit' => $bit_offset_total + $bit_offset_range);
}
my $dir = (!defined($pin->port)) ? "unknown" : ($pin->port->direction eq 'in') ? "in" : "out";
$logger->debug(" pin (" . $dir . ") \"" . $pin->cell->name . HIERSEP . $pin->name . "\"");
# The pin might be the driver but we can't be sure without a preselection.
......@@ -1089,6 +1094,11 @@ sub _get_net_connections {
}
}
}
$bit_offset_total++;
if (defined($netname->{'msb'})) {
my ($low, $high) = _extract_low_high($netname->{'lsb'}, $netname->{'msb'});
$bit_offset_total += $high - $low;
}
}
}
}
......
......@@ -1467,7 +1467,11 @@ sub _select_driver_dialog($) {
my $i = 0;
for my $conn (@{$possible_drivers}) { # FIXME: sort (and probably refactor this whole thing + FIJI::Netlist->_connection_tostr)
my $b = $f->Radiobutton(-value => $i, -variable => \$sel);
my $l = $f->Label(-text => FIJI::Netlist->_connection_tostr($conn, \@conn_str_list), -justify => "left");
my $conn_str = FIJI::Netlist->_connection_tostr($conn, \@conn_str_list);
if (defined($conn->userdata->{'fiji_driver_bit'})) {
$conn_str .= "[" . $conn->userdata('fiji_driver_bit') . "]";
}
my $l = $f->Label(-text => $conn_str, -justify => "left");
# preselect driver
if ( !defined $sel
......
; FIJI::ConfigSorted 0.1
; Thu Apr 7 14:38:29 2016
; Tue Apr 26 18:08:08 2016
[CONSTS]
BAUDRATE=115200
......@@ -46,6 +46,6 @@ DRIVER_PATH="top/cell1/Y"
DRIVER_TYPE=PIN
FAULT_MODEL=RUNTIME
LFSR_MASK=0x0
NET_NAME="top/w[0]"
NET_NAME="top/w[3]"
// testcase_PIN_PIN_bus_concatenation_constant
// testcase 13
// Inject into w[0]
// Inject into w[3]
// DRIVER: PIN, bussed net
// DRIVEN: PIN, bussed net, via concatenation
// DRIVEN: PIN, bussed net, via concatenation with constants
`undef celldef
......@@ -39,7 +38,7 @@ wire [15:0] y,x;
cyclonev_and16 cell1 (.IN1(i), .Y(w));
cyclonev_and16 cell2 (.IN1({w}), .Y(y));
cyclonev_and16 cell3 (.IN1({7'b0,1'b1,w[7:0]}), .Y(x));
cyclonev_and16 cell3 (.IN1({5'b0,w[7:0],3'b1}), .Y(x));
combine comb (.IN1(y), .IN2(x), .OUT(o));
endmodule
\ No newline at end of file
endmodule
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