Commit 716dddda authored by Christian Fibich's avatar Christian Fibich Committed by Stefan Tauner
Browse files

Added JRC headers

parent f7c0546f
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: FIJI.pm
# Created on: 18.02.2015
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
# Various constants used in the FIJI packages.
#-------------------------------------------------------------------------------
## @file
## @class FIJI
......
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: Connection.pm
# Created on: 23.12.2014
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
# Instances of this class represent a single serial connection to a FIJI-compatible DUT.
# Besides handling all communication-related functions they are also responsible for generating and interpreting the respective payloads.
#
# The implementation relies on AnySerialPort.pm to be cross-platform-compatible.
#
#-------------------------------------------------------------------------------
## @file
## @class FIJI::Connection
......
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: Netlist.pm
# Created on: 29.04.2015
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
#
# FIJI Netlist class
#-------------------------------------------------------------------------------
## @file
## @class FIJI::Netlist
......
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: Settings.pm
# Created on: 16.02.2015
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
#
# Contains helper functions to deal with FIJI Settings files.
#-------------------------------------------------------------------------------
## @file
## @class FIJI::Settings
......
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: Tests.pm
# Created on: 11.06.2015
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
#
# Contains helper functions to deal with FIJI Test files.
#-------------------------------------------------------------------------------
## @file
## @class FIJI::Tests
#
# Contains helper functions to deal with FIJI Settings files.
# Contains helper functions to deal with FIJI Test files.
package FIJI::Tests;
use strict;
......
......@@ -9,15 +9,13 @@
#
#-------------------------------------------------------------------------------
# File: VHDL.pm
# $Author$
# Created on: 28.05.2015
# $Date$
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
# Contains functions to generate VHDL package and wrapper files for FIJI
# Contains enum values for marking Verilog-Perl netlist ports with userdata:
#
#
#-------------------------------------------------------------------------------
......
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: DynaMouseWheelBind.pm
# Created on: 25.02.2015
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
# https://rt.cpan.org/Public/Bug/Display.html?id=33655
#-------------------------------------------------------------------------------
# https://rt.cpan.org/Public/Bug/Display.html?id=33655
require Tk::Widget;
......
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: FIJISettingsViewer.pm
# Created on: 25.02.2015
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
# FIJI Settings Viewer class
#-------------------------------------------------------------------------------
## @file
## @class Tk::FIJISettingsViewer
......
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: fiji_download.pl
# Created on: 23.12.2014
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
#
# FIJI download script
#
#-------------------------------------------------------------------------------
## @file
use strict;
......
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: fiji_instrument.pl
# Created on: 29.04.2015
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
#
# FIJI instrument script
#
#-------------------------------------------------------------------------------
## @file
use strict;
......
#-------------------------------------------------------------------------------
# University of Applied Sciences Technikum Wien
#
# Department of Embedded Systems
# http://embsys.technikum-wien.at
#
# Josef Ressel Center for Verification of Embedded Computing Systems
# http://vecs.technikum-wien.at
#
#-------------------------------------------------------------------------------
# File: fiji_setup.pl
# Created on: 25.02.2015
# $LastChangedBy$
# $LastChangedDate$
#
# Description:
#
# FIJI setup script (GUI)
#
#-------------------------------------------------------------------------------
## @file
use strict;
......
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