Commit 650038f0 authored by Christian Fibich's avatar Christian Fibich Committed by Stefan Tauner
Browse files

HX8K Demo: Hardware details

parent dc7c0b1e
......@@ -7,19 +7,27 @@
* FIJI (+environment variable `$FIJI_ROOT` pointing to the checked-out FIJI directory)
* Configuration of Synplify in `impl/instrumented/Makefile`
## HW Setup ##
1. To control FIJI, the HX8K Breakout Board's FTDI is used. Install the following udev rule:
SUBSYSTEM=="tty",ATTRS{idVendor}=="0403",ATTRS{idProduct}=="6010",ATTRS{product}=="Lattice FTUSB Interface Cable", SYMLINK+="ttyHX8K"
2. Connect a VGA DAC to the HX8K breakout board, e.g. a XESS StickIt VGA module
The pin mappings can be found in `impl/original/tinyvga.pcf`. On the XESS
module, pin `red[3]` maps to R4, `blue[3]` to B4, etc. R0 and G0 are not
used and may be left unconnected.
## FIJI Flow ##
1. Carry out the initial synthesis step to obtain a netlist & configure
FIJI by executing
$ make fiji-instrument
$ make fiji-instrument
in `impl/original`
2. Perform the second synthesis step by running
$ make prog && make fiji-launch
$ make prog && make fiji-launch
in `impl/instrumented`
3. Inject & observe faults using the FIJI EE GUI
......@@ -29,7 +37,6 @@
To just implement & download the original hardware, just run
$ make prog
in `impl/original`
## Simulation ##
......@@ -37,6 +44,15 @@ in `impl/original`
To simulate the design for a few frames, run
$ make
in `sim`. Not much automated checking done here...
## HW Details ##
`tinyvga.imem` is an on-chip memory that holds a 128x64 image defined by
`tinyvga.sinetab` controls the motion of the image(s) and is defined by
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