Added basys3 clkgen implementation

docs/demos/tmr_vga/rtl/spriteflyer_clkgen_basys3.vhd

+library ieee;
+    use ieee.numeric_std.all;
+
+architecture basys3 of spriteflyer_clkgen is
+    
+    signal s_ce_count : unsigned (1 downto 0);
+    signal s_reset_n  : std_logic;
+
+begin
+    s_clk_o     <= s_clk_i;
+    s_reset_n   <= not s_reset_x_i;
+    s_reset_n_o <= s_reset_n;
+
+
+    -- 25 MHz clken from input clock clk (100 MHz)
+    p_clken : process (s_clk_i, s_reset_n)
+     begin
+        if s_reset_n = '0' then
+            s_ce25_o   <= '0';
+            s_ce_count <= "00";
+        elsif s_clk_i'event and s_clk_i = '1' then
+            s_ce25_o   <= '0';
+            s_ce_count <= s_ce_count + 1;
+            if s_ce_count = "11" then
+                s_ce25_o <= '1';
+                s_ce_count <= "00";
+            end if;
+        end if;
+    end process p_clken;
+
+end basys3;
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