@@ -122,8 +122,7 @@ Another dialog that is not exclusive to \texttt{fiji\_setup.pl} is \texttt{Tk::F
\label{sec:instrumentation}
The components of the Verilog parsing/generation library named Verilog-Perl contained in the various \texttt{Verilog::*} packages form the backbone of \texttt{fiji\_instrument.pl} that instruments the given user design according to the information in the \ac{FIJI} Settings.
Support for buses and concatenations had to be added to Verilog-Perl by us and is currently in the process of being upstreamed.
Until this is complete you have to use our fork available from \fixme{add link to github or es}.
Support for buses and concatenations had to be added to Verilog-Perl by us and its first version has been merged to upstream in version 3.440.
The interface between Verilog-Perl and \ac{FIJI} is \texttt{FIJI::Netlist} that provides functions to read in Verilog netlists, find drivers of a net and instrumenting nets.
The general idea of the instrumentation process (cf.\ \texttt{FIJI::Netlist::instrument\_net}):
@@ -59,21 +59,14 @@ which can be found in \Cref{tab:perlmod}.
Linux distributions often have Perl interpreters installed by default and we recommend to use the one shipped with the distribution.
The availability of Perl packages varies greatly among distributions but if they are available in the distribution's repository the probably should work fine.
The only exception is Verilog-Perl that was modified quite significantly during the project and is unlikely to include our changes already.
The only exception is Verilog-Perl that was modified quite significantly during the project and is unlikely to include our changes already in any distribution.
The minimum version required is 3.442.
Currently one has to compile Verilog-Perl from source because our modifications have not been merged upstream yet.
You will need the typical build utilities like \texttt{g++}, \texttt{bison}, \texttt{flex} and \texttt{make} for this.
Also, you need to acquire the respective source code from our Github repository at \url{https://github.com/uastw-embsys/Verilog-Perl/archive/pin-selects.zip}.
To build and install it, simply extract the archive, open a shell at the respective location and execute the commands in \Cref{lst:verilog-perl}.