04-hardware.tex 5.35 KB
 Christian Fibich committed May 04, 2018 1 \section{Hardware}  Stefan Tauner committed May 04, 2018 2 A detailed block diagram of the fault injection hardware is shown in \Cref{fig:hardwareblockd}.  Stefan Tauner committed May 04, 2018 3 It can be seen that all fault injection logic is contained in the top level design unit \texttt{fault\_injection\_top}.  Stefan Tauner committed May 04, 2018 4 This module is described further in \Cref{sec:hw_fi_top} followed by overviews of its submodules the subsequent sections.  Christian Fibich committed May 04, 2018 5 6 \begin{figure}[ht] \centering  Stefan Tauner committed May 04, 2018 7 \includegraphics[width=\textwidth]{img/HW.pdf}  Christian Fibich committed May 04, 2018 8 \caption{Hardware Block Diagram}  Christian Fibich committed May 04, 2018 9 10 11 12 13 14 \label{fig:hardwareblockd} \end{figure} \subsection{Top Level} \label{sec:hw_fi_top} This module contains all other fault injection logic such as the fault  Stefan Tauner committed May 04, 2018 15 16 injection \ac{UART} (see \Cref{sec:hw_fi_uart}), the \ac{FIC} (see \Cref{sec:hw_fic}), and the fault injection units (see \Cref{sec:hw_fiu}).  Stefan Tauner committed May 04, 2018 17 The \texttt{fault\_injection\_top} module is intended to be configured and instantiated  Christian Fibich committed May 04, 2018 18 19 by \texttt{fiji\_instrument.pl} when generating the wrapper module for the modified netlist. This configuration is done by assigning the desired values to  Stefan Tauner committed May 04, 2018 20 the constants located in \texttt{public\_config\_pkg} as described in \Cref{tab:vhdl_consts}.  Christian Fibich committed May 04, 2018 21 Both the number of fault injection units and their configuration are  Stefan Tauner committed May 04, 2018 22 23 passed in \texttt{c\_fiu\_config} whose type \texttt{t\_fiu\_records} is an array of \texttt{t\_single\_fiu\_record} defined in the VHDL package \texttt{public\_config\_pkg.vhd}. The described fault  Christian Fibich committed May 04, 2018 24 injection units are daisy-chained by their data input and output in the  Stefan Tauner committed May 04, 2018 25 \texttt{fault\_injection\_top} entity. The leftmost record in \texttt{c\_fiu\_config} describes  Christian Fibich committed May 04, 2018 26 27 28 FIU 0 (the FIU whose data input is directly connected to the FIC) and the rightmost describes FIU n-1 (the last FIU in the daisy chain). The inputs and outputs to be connected at instantiation by the wrapper  Stefan Tauner committed May 04, 2018 29 30 31 32 are described in \Cref{tab:toplevel_inputs} and \Cref{tab:toplevel_outputs}, respectively. \subsection{UART} \label{sec:hw_fi_uart}  Stefan Tauner committed May 04, 2018 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 The \ac{UART} unit consists of a receiver and a transmitter module. The receiver module detects incoming symbols on the asynchronous serial interface, and forwards them to the \ac{FIC} in a synchronous fashion. The interface from the \ac{UART} receiver to the \ac{FIC} consists of the data line, a data-valid signal, and an additional line signaling the start of a byte. Framing errors on the asynchronous interface (e.g., wrong stop bit polarity) are reported to the \ac{FIC} using an error signal for a single cycle. The transmitter module accepts messages on a parallel interface consisting of the data bus and a data-valid signal. It signals when it is ready to receive using an additional ready signal. The transmitter prepends a start bit, and then shifts out the data bits followed by the parity bit and the stop bit. The baud rate used by the receiver and transmitter can be statically configured using the constant \texttt{c\_baudrate} defined in the \texttt{public\_config\_pkg} VHDL package. It also depends on the clock frequency defined via \texttt{c\_frequency} in the same package.  Christian Fibich committed May 04, 2018 49 50 51  \subsection{FIC} \label{sec:hw_fic}  Stefan Tauner committed May 04, 2018 52 The \ac{FIC} decodes the fault injection requests sent by the \ac{FIJIEE} and sequences the fault injection process accordingly.  Christian Fibich committed May 04, 2018 53 54 For this purpose it contains: \begin{itemize}  Stefan Tauner committed May 04, 2018 55  \item a central state machine,  Christian Fibich committed May 04, 2018 56  \item the duration counter,  Stefan Tauner committed May 04, 2018 57  \item CRC calculation logic,  Stefan Tauner committed May 04, 2018 58  \item the \ac{LFSR},  Christian Fibich committed May 04, 2018 59 60 61 62 63 64 65 66  \item synchronization and edge detection logic for the trigger signals, \item registers for the received ID, timer values, and controller configuration. \end{itemize} The central state machine schedules all fault injection operations. This happens according to the configuration word appended to each configuration message. The configuration bits specify if the DUT is reset after the configuration was received, if the FIC waits for the selected trigger signal to transition  Stefan Tauner committed May 04, 2018 67 from inactive to active (cf.\ \texttt{c\_trigger\_dut\_active} and \texttt{c\_trigger\_ext\_active}  Christian Fibich committed May 04, 2018 68 in Table 6) and which trigger (internal or external) to use.  Stefan Tauner committed May 04, 2018 69 The \ac{LFSR} is implemented as a left-shifted Galois type. Thus, the rightmost  Stefan Tauner committed May 04, 2018 70 71 bit in the polynomial specified in \texttt{c\_lfsr\_seed} as a global configuration constant corresponds to $x^1$ and the leftmost bit to $x^{\,\texttt{c\_lfsr\_width}}$.  Christian Fibich committed May 04, 2018 72 73 74 75  \subsection{FIUs} \label{sec:hw_fiu} The fault injection units facilitate the actual fault injection.  Stefan Tauner committed May 04, 2018 76 They are instantiated and configured by \texttt{\texttt{fault\_injection\_top}}. If the  Christian Fibich committed May 04, 2018 77 78 79 80 resources and timing slack are available, all possible fault models can be implemented in a fault injection unit for run-time configuration and selection. If, however, area or timing is critical, fault injection units can be configured to implement only one fault model each.  Stefan Tauner committed May 04, 2018 81 Fault injection units are daisy-chained in \texttt{\texttt{fault\_injection\_top}} as described in \Cref{sec:hw_fi_top}.  Christian Fibich committed May 04, 2018 82   Stefan Tauner committed May 04, 2018 83 84 85 \fixme{Add this as footnote to the specification of \texttt{t\_fiu\_records}? Due to the encoding of the forwarding/fault type in 3 bits, another 2 fault types can be added easily. More than the total of 8 forwarding types would require some hardware and software changes.}  Christian Fibich committed May 04, 2018 86 87 88 89  \begin{table} \caption{Design Constants} \input{content/tab_public_vhdl_constants.tex}  Stefan Tauner committed May 04, 2018 90  \label{tab:vhdl_consts}  Christian Fibich committed May 04, 2018 91 92 \end{table}  Stefan Tauner committed May 04, 2018 93   Christian Fibich committed May 04, 2018 94 95 96 97 98 99 100 101 102 103 104 \begin{table} \caption{Toplevel VHDL Inputs} \input{content/tab_vhdl_inputs.tex} \label{tab:toplevel_inputs} \end{table} \begin{table} \caption{Toplevel VHDL Outputs} \input{content/tab_vhdl_outputs.tex} \label{tab:toplevel_outputs} \end{table}