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SOURCE=../../rtl/tinyvga.v ../../rtl/pll_hx8k.v

.PHONY: sta all fiji-setup fiji-instrument

all : tinyvga.bin

tinyvga_netlist.v : tinyvga.blif

tinyvga.blif : $(SOURCE)
	yosys -v4 -l synth.log -p 'synth_ice40 -top tinyvga -blif $@; write_verilog -defparam tinyvga_netlist.v' $^

tinyvga.asc: tinyvga.blif tinyvga.pcf
	arachne-pnr -d 8k -o tinyvga.asc -p tinyvga.pcf tinyvga.blif  -P ct256

sta : tinyvga.asc tinyvga.pcf
	icetime -P ct256 -p tinyvga.pcf -o $@ -d hx8k -c 36 $<

tinyvga.bin: tinyvga.asc sta
	icepack tinyvga.asc tinyvga.bin

prog : tinyvga.bin
	iceprog tinyvga.bin

fiji-setup : ../fiji/fiji.cfg
fiji-instrument : ../fiji/tinyvga_download.cfg

../fiji/fiji.cfg : tinyvga_netlist.v | ../fiji
	$(FIJI_ROOT)/bin/fiji_setup.pl -s $@ -n $<

../fiji/tinyvga_download.cfg : ../fiji/fiji.cfg tinyvga_netlist.v | ../fiji
	$(FIJI_ROOT)/bin/fiji_instrument.pl -s ../fiji/fiji.cfg -n tinyvga_netlist.v -o ../fiji -p tinyvga

../fiji : 
	mkdir -p ../fiji