Due to the fact that triggering the signal in software was not sufficient enough, the triggering was implemented in hardware. In addition, the ETS feature is dependent on hardware triggering. ETS will be discussed in Equivalent Time Sampling - Theory.
The hardware trigger circuit basically consist of a fast comparator which compares the signal with a defined voltage level. This voltage is the trigger level which is set by the user of the oscilloscope. If the measured signal reaches the trigger level, the output of the comparator will be at high level. If the signal drops below the trigger level, the output will be at low level. This rising and falling edges of the output of the comparator can be analyzed by the FPGA or microcontroller to detect trigger pulses. The trigger level is set by the user at the Graphical User Interface (GUI). The GUI then sends a command to the FPGA or microcontroller to configure their PWM outputs. The duty cycle of the generated PWM signal then defines the voltage at the comparator and therefore the trigger level. To convert the PWM signal into a DC voltage, the signal is passed through a low pass filter. Figure 1 shows the section of the OpenLab front-end which contains the hardware trigger circuit.
The behavior of the trigger detection stage can be seen in figure 2.
The applied test signal is a 5V 100Hz sine waveform. As input to this stage, the trigger detection unit is directly connected to the output of stage 5. So stage 7 is protected in the same way as the ADCs of the OpenLab oscilloscope, regarding negative- and over voltage. The trigger level is simulated to be set to 0V by the GUI. Therefore, the PWM of the FPGA must have an duty cycle of 50%.
The waveform shown in green illustrates the voltage of the trigger level after passing the lowpass filter. The voltage hits the target trigger level after the capacitor is fully charged.
Due to the added offset (see Stage 4 Adding a Constant Offset to the Signal), the trigger level is set to 1.75V. This is necessary to display the captured waveform in the PC application correctly.
0V trigger level configured by the GUI, translates to 1.75V (the virtual zero point) at the signal processing front-end.