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= Stage 3 Variable Amplification
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To be able to measure signals within a wide input voltage range, a variable amplification stage is mandatory. This stage will, depending on the signal amplitude, amplify or attenuate the signal.
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This ensures that the ADC, at the end of the front-end, always samples at nearly full scale.
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Because of the characteristics of the chosen ADCs of the OpenLab front-end, the acceptable input range is defined as 0V to 3.3V.
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This includes the external ADCs, needed by the FPGA-based solution, as well as the integrated ADCs of the microcontroller-based solution.
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As a side effect of the ADC input protection stage, the input range of the ADC is limited from 0.8V to 2.7V.
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The reason for this limitation is the characteristics of standard silicon-based diodes. Diodes will not start to clip voltages at a strict defined level.
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The signal that is passed through the protection stage will get distorted in connection with the characteristic curve of the used diode.
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In case of the OpenLab front-end, signals with a voltage range outside of 0.8V – 2.7V will get distorted.
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So the voltage of the measured signal has to be prepared by the variable amplification stage to fulfill the previously mentioned limitations.
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{empty} +
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This is done by changing the gain-level of stage 3, depending on the amplitude of the input signal.
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Figure 16, shows the schematic of stage 3. It includes the op-amp and the amplification stage selection circuit.
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