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To be able to measure signals within a wide input voltage range, a variable amplification stage is mandatory. This stage will, depending on the signal amplitude, amplify or attenuate the signal. This ensures that the ADC, at the end of the front-end, always samples at nearly full scale. Because of the characteristics of the chosen ADCs of the OpenLab front-end, the acceptable input range is defined as 0V to 3.3V. This includes the external ADCs, needed by the FPGA-based solution, as well as the integrated ADCs of the microcontroller-based solution. As a side effect of the ADC input protection stage, the input range of the ADC is limited from 0.8V to 2.7V. The reason for this limitation is the characteristics of standard silicon-based diodes. Diodes will not start to clip voltages at a strict defined level. The signal that is passed through the protection stage will get distorted in connection with the characteristic curve of the used diode. In case of the OpenLab front-end, signals with a voltage range outside of 0.8V - 2.7V will get distorted. So the voltage of the measured signal has to be prepared by the variable amplification stage to fulfill the previously mentioned limitations.
This is done by changing the gain-level of stage 3, depending on the amplitude of the input signal. Figure 1, shows the schematic of stage 3. It includes the op-amp and the amplification stage selection circuit.
The gain level is selected by changing the ratio of the voltage divider of the non-inverting operational amplifier. A simplified version of this circuit is illustrated in figure 2.
By applying the formula of a standard non-inverting op-amp, the gain level (AV) can be calculated as shown in the following calculation.
In case of the OpenLab front-end the resistance of Rgadj is changed by switching through various resistors, while Rf stays at a fixed value. This will adjust the desired amplification accordingly.
Rgadj is changed by opening or closing the ground connection through bipolar transistors.
Those transistors on the other hand, are controlled by a de-multiplexer which is directly accessed by the development board.
This applies to the FPGA-based oscilloscope as well as to the microcontroller-based solution.
The correct values of Rgadj , at each amplification stage, were calculated and summarized in table 1. This listing also mentions the gain of each amplification stage and at what input voltage range it is used for.
As can be seen in table 1, the output voltage range of each amplification stage varies from stage to stage. This could be minimized by using resistors of a higher class.
The OpenLab oscilloscope uses resistors of the E12 or E24 series to reduce costs. This helps to achieve the low-cost status of the project.
Those variations of the output voltage are compensated in software to maintain correct measurements.
The following chart, shown in figure 3, is an example of the input versus output waveform of stage 3. The test signal had the characteristics of a sinusoidal waveform with an amplitude of 5V and a frequency of 1kHz.
The waveform drawn in red represents the input of stage 3. The output is shown by the blue signal. According to table 1, amplification stage 3 was selected. This will amplify the input signal of stage 3 by a factor of 3.68.