This section of the circuit functions as a high impedance input for the first amplifier stage. As described in the previous page Research on existing front-end solutions, the usage of a FET voltage follower is quite common in relation to oscilloscope front-ends. Due to the fact that op-amps tend to add a small offset to their output signal, it is possible that the measured signal gets level shifted and therefore distorted. To encounter this and for calibration reasons, this stage got modified to compensate any unwanted offset. This was done by adding a potentiometer to the FET which is connected to the negative voltage source. The schematic of stage 2 is shown in figure 1.
If the value of the resistance of the potentiometer is higher than resistor R7, a positive offset will be added. The other way around a negative offset will be added. When the resistance of R7 is exactly the same as the combined resistance of R16 and RV1, the offset will be zero. With this potentiometer, minimal offset errors can be corrected in hardware.