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== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_hardware[<Signal Processing Hardware] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_theory[Equivalent Time Sampling - Theory>]
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= Research on existing solutions
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To gather more knowledge about how a typical oscilloscope performs analog-signal processing, the results of the state-of-the-art research (see xy) were further analyzed.
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For this purpose, only projects with access to the schematic of the hardware provided enough information.
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The three most interesting projects were selected for deeper investigation.
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The XMEGA Xminilab developed by Gabotronics [9], for example, designed a front-end which is capable of processing analog signals at a voltage range of -14V to +20V.
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This signal processing circuit only consist of 3 parts, or stages, as can be seen in figure 9.
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image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/sig_proc_osci_hardware/sig_proc_osci_hardware_xminilab.PNG[caption="Figure 1: ",title="Section of the analog front-end of the XMEGA Xminilab by Gabotronics (9)",align="center"]
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The first stage (R2 & R3) is a simple voltage divider and is used to attenuate the input signal by a factor of 5.5. Besides that, this stage is also used as the input impedance of the oscilloscope.
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Stage two is a non-inverting amplifier which is used to amplify the signal by a factor of 1.1 or 0.92dB. The last stage adds an offset to the measured signal.
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This prevents any negative voltages reaching the input of the ADC. As a second function, this stage defines the input capacitance of the XMEGA Xminilab oscilloscope [9].
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This very basic oscilloscope front-end is only capable of processing signals at a maximum bandwidth of 200 kHz which is way below the requirements of the OpenLab oscilloscope as described in chapter 3.2.
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A more advanced and better documented project is the OsciPrime oscilloscope, designed by students of the University of Applied Sciences Northwestern Switzerland [18].
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The front-end of this measurement device is capable of processing analog signals with a much higher frequency of up to 8 MHz.
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The specifications of this front-end covers more of the requirements of the OpenLab oscilloscope.
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So the final design is mainly built on the analyses of the OsciPrime hardware.
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The following section of the OsciPrime hardware schematic, seen in figure 10 shows the signal processing path of the front-end.
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image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/sig_proc_osci_hardware/sig_proc_osci_hardware_osciprime.PNG[caption="Figure 2: ",title="Section of the analog front-end of the OsciPrime oscilloscope (23)",align="center"]
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The more complex hardware consists of a total of 4 analog signal processing stages. The first stage (C1, C2, C3, C73 & R1, R2) will attenuate the signal by a factor of 2.
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Additionally, it acts as the input impedance of the oscilloscope as well as the input capacitance.
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The next stage consist of a non-inverting amplifier (op-amp A of OP1) and is used, in combination with an analog switch, as an amplifier with variable amplification.
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This variable amplification is needed to ensure, that the ADC is able to digitize an optimal signal. This signal should fit the complete input voltage range of the ADC.
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The reason for this procedure is to obtain a high resolution of the measured signal [23].
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Due to the fact that the OsciPrime oscilloscope uses non-differential ADCs, the voltage of the input signal of those ADCs should not fall below 0V.
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Stage three (op-amp B of OP1) inverts the measured signal and adds an offset. The offset ensures that only positive signals will reach the ADC.
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The last stage (R14 & C5) is a basic low-pass filter which improves the general signal quality (23).
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The last interesting project was designed by Stefan Salewski [22] and includes some ideas and thoughts about developing a homemade digital-storage-oscilloscope.
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The front-end design is theoretically able to process signals up to 100 MHz but was never tested or simulated before.
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The input voltage range is specified from +-0.25V to a maximum of +-18V peak to peak.
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Due to the fact that the OpenLab oscilloscope should be designed as a low-cost solution, only some parts of the front-end were further analyzed.
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Additionally, the specifications of [22] are way to advanced compared to the OpenLab requirements. The segment of interest of the schematic is shown in figure 11.
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image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/sig_proc_osci_hardware/sig_proc_osci_hardware_salewski.PNG[caption="Figure 3: ",title="Segment of the analog front-end design of a oscilloscope by Stefan Salewski (22)",align="center"]
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The first stage of the circuit is very similar to the solution of the OsciPrime front-end, and serves again as the input impedance and capacitance of the oscilloscope.
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The second stage acts as a high impedance op-amp input and was missing in all previously mentioned front-end solutions.
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The book The Art of Electronics [19] emphasizes the usage of so called, source followers, as input stages in oscilloscopes.
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The results of the analysis of the previously mentioned projects lead to the final front-end design of the OpenLab oscilloscope, which fulfills all, in chapter 3.2 defined, specifications.
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== Bibliography
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. KALSI, H.: _Electronic Instrumentation_, vol. 2. Tata McGraw-Hill Publishing Company, 1995
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. STEFAN SALEWSKI: _Digitales Speicher-Oszilloskop (DSO)_ [Online] http://www.ssalewski.de/DSO.html.de[Homepage of Stefan Salewski]
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== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_hardware[<Signal Processing Hardware] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_theory[Equivalent Time Sampling - Theory>] |