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updated sig_proc_osci chapter authored by Patrick Schmitt's avatar Patrick Schmitt
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sig_proc_osci_hardware.asciidoc
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A detailed description of each stage will be given by the following sub-chapters. A detailed description of each stage, and the analysis of existing solutions, will be given by the following sub-chapters.
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_osci_research[Research on existing front-end solutions]
* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_osci_stage1[Stage 1 Front-End Impedance and Capacitance Matching] * https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_osci_stage1[Stage 1 Front-End Impedance and Capacitance Matching]
* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_osci_stage2[Stage 2 Offset Compensation and Op-amp Input Stage] * https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_osci_stage2[Stage 2 Offset Compensation and Op-amp Input Stage]
* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_osci_stage3[Stage 3 Variable Amplification] * https://es.technikum-wien.at/openlab/openlab_wiki/wikis/sig_proc_osci_stage3[Stage 3 Variable Amplification]
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