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added first tabled entries
authored
Jan 29, 2017
by
Patrick Schmitt
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@@ -19,8 +19,7 @@ https://es.technikum-wien.at/openlab/openlab_wiki/wikis/asciidoc_cheatsheet[Asci
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== *Table of Content*
* deep 1
** deep 2
*** deep 3
**** deep 4
***** deep 5
\ No newline at end of file
. https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_theory[Equivalent Time Sampling - Theory]
.. https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_SETS[Sequential Equivalent Time Samling]
.. https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_RETS[Random Equivalent Time Samling]
. https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_FPGA[Equivalent Time Sampling - FPGA Implementation]
