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changed ETS-FPGA implementation to SETS-FPGA implementation in order to... authored by Patrick Schmitt's avatar Patrick Schmitt 
changed ETS-FPGA implementation to SETS-FPGA implementation in order to clarify what method was implemented
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......@@ -22,4 +22,4 @@ https://es.technikum-wien.at/openlab/openlab_wiki/wikis/asciidoc_cheatsheet[Asci
. https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_theory[Equivalent Time Sampling - Theory]
.. https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_SETS[Sequential Equivalent Time Samling]
.. https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_RETS[Random Equivalent Time Samling]
. https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_FPGA[Equivalent Time Sampling - FPGA Implementation]
. https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_FPGA[Sequential Equivalent Time Sampling - FPGA Implementation]