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fixed bad title in file SOTA_osci.asciidoc and SOTA_osci_uC.asciidoc and... authored by Patrick Schmitt's avatar Patrick Schmitt 
fixed bad title in file SOTA_osci.asciidoc and SOTA_osci_uC.asciidoc and sig_proc_osci_research.asciidoc
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SOTA_osci_uC.asciidoc
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== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SOTA_osci[<State of the Art Research (SOTA) (Oscilloscope)] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SOTA_osci_FPGA[FPGA/CPLD-based projects/products>] == https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SOTA_osci[<State of the Art Research (Oscilloscope)] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SOTA_osci_FPGA[FPGA/CPLD-based projects/products>]
= Micro-controller-based projects/products = Micro-controller-based projects/products
...@@ -209,4 +209,4 @@ This chapter is primarily based on the master thesis "Development of a low-cost ...@@ -209,4 +209,4 @@ This chapter is primarily based on the master thesis "Development of a low-cost
{empty} + {empty} +
== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SOTA_osci[<State of the Art Research (SOTA) (Oscilloscope)] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SOTA_osci_FPGA[FPGA/CPLD-based projects/products>] == https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SOTA_osci[<State of the Art Research (Oscilloscope)] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SOTA_osci_FPGA[FPGA/CPLD-based projects/products>]