Changes

Page history
Added SETS_FPGA_formula1.PNG to SETS_FPGA.asciidoc authored by Patrick Schmitt's avatar Patrick Schmitt
Show whitespace changes
Inline Side-by-side
SETS_FPGA.asciidoc
View page @ dec3a0ba
...@@ -97,4 +97,8 @@ Because of the fact that the input signal has to be repetitive, the FPGA can cal ...@@ -97,4 +97,8 @@ Because of the fact that the input signal has to be repetitive, the FPGA can cal
{empty} + {empty} +
image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/SETS_FPGA/SETS_FPGA_formula1.png[caption="Formula 1: ",title="Calculates the timing to start the acquisition during the first SETS-packet",height=350,align="center"]
{empty} +
== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SETS_theory[<Sequential Equivalent Time Samling - Theory] | Not set yet > == https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/SETS_theory[<Sequential Equivalent Time Samling - Theory] | Not set yet >