@@ -22,7 +22,7 @@ The start and stop timings of the signal-period counter is shown by the time-lin
{empty} +
image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/SETS_FPGA/SETS_FPGA_signal_analysis.png[caption="Figure 1: ",title="Period analysis of the input signal (ETS)",height=280,align="center"]
image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/SETS_FPGA/SETS_FPGA_signal_analysis.png[caption="Figure 1: ",title="Period analysis of the input signal (ETS)",height=350,align="center"]
