... | ... | @@ -142,11 +142,9 @@ Table 1 shows the possible settings and its relation to the delay set by the FPG |
|
|
{empty} +
|
|
|
|
|
|
.Table 1: Timing relations regarding the supported ETS sample rates
|
|
|
[options="header"]
|
|
|
[cols="4*", options="header"]
|
|
|
|====
|
|
|
|
|
|
^| *ETS FPGA-time settings*
|
|
|
|
|
|
^| Virtual Sample Rate
|
|
|
^| Acquisition Rounds
|
|
|
^| Time Distance Sample-Sample [ns]
|
... | ... | @@ -156,6 +154,7 @@ Table 1 shows the possible settings and its relation to the delay set by the FPG |
|
|
|5MSa/s
|
|
|
|5MSa/s
|
|
|
|5MSa/s
|
|
|
|
|
|
|====
|
|
|
|
|
|
|
... | ... | |