== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_RETS[<Random Equivalent Time Samling] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_FPGA_CONFIG[Configuring the FPGA design for capturing samples in SETS-mode>]
= Sequential Equivalent Time Sampling - FPGA Implementation
The previous wiki page described the functionality and the different methods of ETS. This page covers the implementation of SETS acquisition method, on a FPGA based oscilloscope.
Within the OpenLab project, a modified version of SETS was implemented.
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The following sections explains how a waveform is captured and displayed using the SETS-mode of the OpenLab FPGA based oscilloscope.
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_FPGA_CONFIG[Configuring the FPGA design for capturing samples in SETS-mode]
* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_FPGA_FLOW[The process of capturing and reconstructing waveforms during SETS-mode]
* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_FPGA_COMPONENT[The implementation of the SETS component of the FPGA design]
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== https://es.technikum-wien.at/openlab/openlab_wiki/wikis/home[Home] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_RETS[<Random Equivalent Time Samling] | https://es.technikum-wien.at/openlab/openlab_wiki/wikis/ETS_FPGA_CONFIG[Configuring the FPGA design for capturing samples in SETS-mode>]
