... | ... | @@ -13,7 +13,7 @@ Figure 44 shows the in- and outputs of the sampling-data-and-triggering componen |
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image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/OpenLab_osci_FPGA_imp/osci_FPGA_imp_TTL_UART.PNG[caption="Figure 1: ",title="Inputs and outputs overview of the sampling-data-and-triggering - component",align="center"]
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image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/OpenLab_osci_FPGA_imp/osci_FPGA_imp_TTL_UART.PNG[caption="Figure 1: ",title="Inputs and outputs overview of the sampling data and triggering component",align="center"]
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... | ... | @@ -21,7 +21,7 @@ This entity is designed to be instantiated multiple times. Each instance than ha |
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of the oscilloscope. In case of the OpenLab oscilloscope two channels are implemented.
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The sampling-data-and-triggering entity directly controls one of the ADC interfaces. The component
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is able to control the sample rate and manages the power modes of the ADCs. Each
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sample is stored in one of the two FIFO – buffers. Both channels have their own FIFO – buffer
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sample is stored in one of the two FIFO - buffers. Both channels have their own FIFO - buffer
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to enable parallel acquisition. One buffer can store 4096 words. One word is 9 bits in size. This
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uncommon word size is used to store additional information beside the ADC data itself. This
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will be explained in detail by the following paragraphs.
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... | ... | @@ -34,7 +34,7 @@ set if a trigger event was detected. In order to reduce false trigger events, th |
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of the same channel, set as the trigger channel, is compared to the current sample data. In
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case of a rising edge trigger event, the value of the current sample has to be higher than the
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value of the last sample. If a valid trigger event was detected, the TRIGGER_FOUND flag is set.
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This information is stored in the last bit of the 9-bit wide word of the FIFO – buffer. The first 8 bit
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This information is stored in the last bit of the 9-bit wide word of the FIFO - buffer. The first 8 bit
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contains the data of the captured sample. The ninth bit declares whether the sample represents
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the first sample after a trigger event or not. This enables the communication-protocol-interpreter
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entity to detect the start point of a triggered signal.
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