@@ -13,7 +13,7 @@ Figure 44 shows the in- and outputs of the sampling-data-and-triggering componen
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image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/OpenLab_osci_FPGA_imp/osci_FPGA_imp_TTL_UART.PNG[caption="Figure 1: ",title="Inputs and outputs overview of the sampling data and triggering component",align="center"]
image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/OpenLab_osci_FPGA_imp/osci_FPGA_imp_sampling_trigger.PNG[caption="Figure 1: ",title="Inputs and outputs overview of the sampling data and triggering component",align="center"]
