OpenLab_osci_FPGA_imp2.asciidoc

@@ -29,5 +29,23 @@ The status of the transmit unit is shown by TX_BUSY in order to prevent data cor
 
 {empty} +
 
+== UART data frame
+
+The UART communication transmits bytes by splitting the data into their individual bits in order to transfer them sequentially over a single transmission line.
+Data is received by reversing the process. During idle, the transmission line is pulled high. The start of transmission is declared by sending the start bit as shown in figure 43.
+The receiver uses the start bit to detect the beginning of the next data package.
+
+{empty} +
+
+image::https://es.technikum-wien.at/openlab/openlab_wiki/wikis/img/OpenLab_osci_FPGA_imp/osci_FPGA_imp_UART_frame.PNG[caption="Figure 1: ",title="UART data frame",align="center"]
+
+{empty} +
+
+The next transmitted bits contain the data word and can vary in sizes between 5 to 9 bits. The parity bit is optional and not displayed in figure 43.
+It can be used in order to detect corrupted data packets, but uses bandwidth and therefore reduces the data rate. The end of one transmission cycle is declared by the stop bit.
+Depending on the configuration of the UART interface, the stop bit can be 1, 1.5 or 2 bits long. The data rate depends on the selected baud rate.
+It declares the frequency at which one bit is transfered. Regarding the OpenLab oscilloscope, the UART communication is configured to use a 8 bit wide word, no parity bit and 1 stop bit.
+
+
 
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