... | @@ -135,7 +135,7 @@ By powering up the FPGA design the state machine will start execution at this st |
... | @@ -135,7 +135,7 @@ By powering up the FPGA design the state machine will start execution at this st |
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This state is used to generate a dummy message. The dummy message is two bytes in
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This state is used to generate a dummy message. The dummy message is two bytes in
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size and does not comply to any valid command or reply. It initializes the data path of
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size and does not comply to any valid command or reply. It initializes the data path of
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generating reply messages and prevents corrupted data during the power up phase. The
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generating reply messages and prevents corrupted data during the power up phase. The
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values of the two dummy bytes are considered as dont care. This state is only reached
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values of the two dummy bytes are considered as don't care. This state is only reached
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once during power up and cannot be reached during normal operation.
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once during power up and cannot be reached during normal operation.
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