... | @@ -34,7 +34,7 @@ The first instance handles the trigger level control. The second instance is res |
... | @@ -34,7 +34,7 @@ The first instance handles the trigger level control. The second instance is res |
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The following weblinks will link you to the websites describing the main components of the FPGA design:
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The following weblinks will link you to the websites describing the main components of the FPGA design:
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp1[Protocol Interpreter and Reply Generator]
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp1[Protocol Interpreter and Reply Generator]
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp2[Data communication between FPGA & PC]
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp2[Data communication between FPGA and PC]
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp3[Sampling data and triggering]
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp3[Sampling data and triggering]
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp4[ADC - interface]
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp4[ADC - interface]
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp5[Trigger edge detect]
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* https://es.technikum-wien.at/openlab/openlab_wiki/wikis/OpenLab_osci_FPGA_imp5[Trigger edge detect]
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