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# 5. Getting Started - Zybo
## 5.1 Introduction
The following section presents a tutorial for the ZyboDevelopment Board.
### 5.1.1 Pre-requisites
Following pre-requisites are necessary in order to work through this tutorial:
+ Vivado HLx 2015.4 (see [Vivado Toolchain](https://es.technikum-wien.at/iplat/testwiki/wikis/vivado-toolchain) for an installation guide)
+ ZyboDevelopment Board
+ micro USB cable
**Note:** Vivado 2016.1 was successfully tested with this tutorial.
### 5.1.2 Download the Design files
An archive with the design files can be downloaded [here](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/design-files/GettingStartedZybo.zip).
Furthermore, download the [board definition files](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybodesign-files/BoardFiles.zip) for the Zybo development Board. Extract the archive and copy the folder **zybo** to following directory:
$VIVADO_ROOT_DIR$/2015.4/data/boards/board_files
## 5.2 Tutorial
This section explains how to generate the FPGA hardware bitstream using the Xilinx Vivado tool. Then the project will be exported to Xinlinx SDK, where a simple blink led application will be created. Furthermore the board setup will be explained. Finally, the Bitstream will be flashed onto the FPGA and the application will be tested.
Click on the **Add Files** Button. Browse to the previously downloaded and extracted zip folder. Select **blink_led.vhd** and click **OK**. Make sure that the **Copy sources into project** checkbox is selected and the target language and simulator language is set to VHDL. Click **Next** twice.
Click on the **Add Files** Button. Browse to the previously downloaded and extracted zip folder. Select **blink_led.xdc** and click **OK**. Make sure that the **Copy constraints files into project** checkbox is selected. Click **Next**.
Click **Finish** to finish the project creation process.
In the **Project Manager** toolbar click the **Generate Bitstream** button which can be found in the Program and Debug subsection. A window pops up. Click on **Yes**.
A window should pop up once the bitstream generation finished successfully. Click on **Cancel**.
### 5.2.2 Board Setup
Make sure that **JP2** is configured to use **USB** as power source. Furthermore, make sure **JP1** is configured to the **JTAG** mode. Insert a micro USB cable to **JC4** and connect it to your PC. Make sure that the switches **SW0 - SW15** are in the off position.
After the bitstream is downloaded successfully the **DONE** LED of the Board should light up. Switch **SW0** into the up position. **LD0** starts to blink. Switch **SW0 - SW15** into the up position. **LD0-LD15** blink synchronously.
This concludes the Basys3 Getting Started tutorial.
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