@@ -27,7 +27,7 @@ An archive with the design files can be downloaded [here](https://es.technikum-w
+**blink_led.xdc:** Xilinx constraints file (Used to connect the top level Ports to the desired Pins).
+**main.c:** Applcation source code.
+**UAS_TEchnikum_Wien_user_blink_led_1.0:**: Blink LED IP Core.
+**UAS_TEchnikum_Wien_user_blink_led_1.0:** Blink LED IP Core.
Furthermore, download the [board definition files](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/designfiles/BoardFilesZybo.zip) for the Zybo development Board. Extract the archive and copy the folder **zybo** to following directory:
