getting-started-zybo.md

@@ -76,7 +76,7 @@ Click on the **Repository Manager** tab, then click on the plus button to add th
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo8.png)
 
-Browse to the extracted GettingStartedZybo.zip folder and click **OK**. A window pops up, click **ok**. Click **OK** to leave the**Project Settings**.
+Browse to the extracted GettingStartedZybo.zip folder and click **OK**. A window pops up, click **OK**. Click **OK** to leave the **Project Settings**.
 
 Right click on empty space in the diagram pane. Click **Add IP** and type in **blink_led**. Double click on **blink_led_v1.0**.
 
@@ -84,7 +84,7 @@ Click on **Run ConnectionAutomation** on the topside of the diagram pane.  A win
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo9.png)
 
-Double Click on **processing_system7_0** block. Click on**MIO Configurations**. Click on the button shown below to expand all peripherals. Deselect all peripherals except **UART1**. Click on **OK**. 
+Double Click on **processing_system7_0** block. Click on **MIO Configurations**. Click on the button shown below to expand all peripherals. Deselect all peripherals except **UART1**. Click **OK**. 
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo10.png)
 
@@ -107,7 +107,7 @@ In the **Sources** tab right click on **blink_led_zybo_bd** and click on **Gener
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo14.png)
 
-In the **Sources** tab right click on **blink_led_zybo_bd** and click on **Create HDL wrapper**. Leave the default option, **Let Vivado manage wrapper and auto-update**. Click **OK*.
+In the **Sources** tab right click on **blink_led_zybo_bd** and click on **Create HDL wrapper**. Leave the default option, **Let Vivado manage wrapper and auto-update**. Click **OK**.
 
 In the **Flow Navigator** toolbar click the **Generate Bitstream** button which can be found in the Program and Debug subsection. A window pops up. Click on **Save**. Another window pops up. Click on **Yes**.
 
@@ -115,11 +115,11 @@ In the **Flow Navigator** toolbar click the **Generate Bitstream** button which
 
 A window should pop up once the bitstream generation finished successfully. Click on **Cancel**.
 
-Now click on **File -> Export -> Export Hardware**.Check the **Include bitstream** checkbox and leave the **Export to:** dropdown menu at **<Local to project**. Click **OK**.
+Now click on **File -> Export -> Export Hardware**. Check the **Include bitstream** checkbox and leave the **Export to:** dropdown menu at **<Local to project>**. Click **OK**.
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo16.png)
 
-Finally, click on **File -> Launch SDK**. Leave both options at **<Local to project**. Click **OK**.
+Finally, click on **File -> Launch SDK**. Leave both options at **<Local to project>**. Click **OK**.
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo17.png)
 
@@ -143,7 +143,7 @@ Choose **General -> File System** and click **Next**.
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo21.png)
 
-Browse to the location of the downloadand extracted GettingStartedZybo.zip file. Select **main.c** and click **Finish**.
+Browse to the location of the downloadand and extracted GettingStartedZybo.zip file. Select **main.c** and click **Finish**.
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo22.png)
 
@@ -163,7 +163,7 @@ Right click on the **blink_led** project and click on **Run as -> Run Configurat
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo23.png)
 
-Click on the **STDIO Connection** tab. Check the **Connect STDIO to Console** checkbox. Choose the appropriate Com Port and set the Baud Rate to **115200**. 
+Click on the **STDIO Connection** tab. Check the **Connect STDIO to Console** checkbox. Choose the appropriate **Com Port** and set the Baud Rate to **115200**. 
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo24.png)
 
@@ -171,7 +171,7 @@ Click **Apply**, then click **Close**. Now Click on **Xilinx Tools -> Program FP
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo25.png)
 
-After the bitstream is sucessfully flashed onto the FPGA the DONE LED (**LD10**) lights up.  Now click on the run Button the start the application. 
+After the bitstream is sucessfully flashed onto the FPGA the **DONE LED** (**LD10**) lights up.  Now click on the **run** Button the start the application. 
 
 ![](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-zybo/img/tutorial_zybo26.png)