In the Diagram of the newly created block design right click anywhere. Click **Add IP** and type in **Zynq**. Double click on**ZYNQ7 Processing System**.
In the Diagram of the newly created block design right click anywhere. Click **Add IP** and type in **Zynq**. Double click on**ZYNQ7 Processing System**.
Click on **Run Block Automation** on the topside of the diagram pane.
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@@ -76,19 +76,19 @@ Click on the **Repository Manager** tab, then click on the plus button to add th
Double Click on **processing_system7_0** block. Click on**MIO Configurations**. Click on the button shown below to expand all peripherals. Deselect all peripherals except **UART1**. Click on **OK**.
Double Click on **processing_system7_0** block. Click on**MIO Configurations**. Click on the button shown below to expand all peripherals. Deselect all peripherals except **UART1**. Click **OK**.
Right click on empty space in the diagram pane. Click **Create Port**. For Port name type **leds_out**.Set the**Direction** to **Output**. Leave the **Type** as **Other**. Check the **Create vector** checkbox. Type from **3** to **0**.
Right click on empty space in the diagram pane. Click **Create Port**. For Port name type **leds_out**.Set the**Direction** to **Output**. Leave the **Type** as **Other**. Check the **Create vector** checkbox. Type from **3** to **0**.
In the **Sources** tab right click on **blink_led_zybo_bd** and click on **Create HDL wrapper**. Leave the default option, **Let Vivado manage wrapper and auto-update**. Click **OK*.
In the **Sources** tab right click on **blink_led_zybo_bd** and click on **Create HDL wrapper**. Leave the default option, **Let Vivado manage wrapper and auto-update**. Click **OK**.
In the **Flow Navigator** toolbar click the **Generate Bitstream** button which can be found in the Program and Debug subsection. A window pops up. Click on **Save**. Another window pops up. Click on **Yes**.
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@@ -115,11 +115,11 @@ In the **Flow Navigator** toolbar click the **Generate Bitstream** button which
A window should pop up once the bitstream generation finished successfully. Click on **Cancel**.
Now click on **File -> Export -> Export Hardware**.Check the **Include bitstream** checkbox and leave the **Export to:** dropdown menu at **<Local to project**. Click **OK**.
Now click on **File -> Export -> Export Hardware**.Check the **Include bitstream** checkbox and leave the **Export to:** dropdown menu at **<Local to project>**. Click **OK**.
@@ -127,7 +127,7 @@ This concludes the Hardware generation process.
### 5.2.2 Xilinx SDK
Click on **File -> New -> Application Project** to create a new project. As project name enter**blink_led**. Leave all other options at their default values. Click **Next**.
Click on **File -> New -> Application Project** to create a new project. As project name enter**blink_led**. Leave all other options at their default values. Click **Next**.
Click on the **STDIO Connection** tab. Check the **Connect STDIO to Console** checkbox. Choose the appropriate Com Port and set the Baud Rate to **115200**.
Click on the **STDIO Connection** tab. Check the **Connect STDIO to Console** checkbox. Choose the appropriate **Com Port** and set the Baud Rate to **115200**.
After the bitstream is sucessfully flashed onto the FPGA the DONE LED (**LD10**) lights up. Now click on the run Button the start the application.
After the bitstream is sucessfully flashed onto the FPGA the **DONE LED** (**LD10**) lights up. Now click on the **run** Button the start the application.
