getting-started-basys3.md

@@ -18,14 +18,16 @@ Following pre-requisites are necessary in order to work through this tutorial:
 
 ### 5.1.2 Download the Design files
 
-An archive with the design files can be downloaded [here](https://es.technikum-wien.at/iplat/testwiki/wikis/vivado-toolchain).
+An archive with the design files can be downloaded [here](https://es.technikum-wien.at/iplat/testwiki/raw/master/getting-started-basys3/design-files/GettingStartedBasys3.zip).
 
 ## 5.2 Tutorial
 
-This section explains how to generate the FPGA hardware bitstream using the Xilinx Vivado tool.
+This section explains how to generate the FPGA hardware bitstream using the Xilinx Vivado tool. Furthermore, the Board Setup will be explained. Finally the Bitstream will be flashed onto the FPGA an the Apllication will run on the FPGA.
 
 ###5.2.1  Building the Bitstream
+
 ###5.2.2 Board Setup
+
 ###5.2.2 Run the Demo