| ... | ... | @@ -26,11 +26,11 @@ This section explains how to generate the FPGA hardware bitstream using the Xili |
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### 5.2.1 Building the Bitstream
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~~1. Launch Vivado:~~
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__1. Launch Vivado:__**
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+ select **Start > All Programs > Xilinx Design Tools > Vivado 2015.4 > Vivado 2015.4**
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~~2. Create new Project~~
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__2. Create new Project__**
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Click on the **Create New Project** button in the quick start menu. Click **Next**. Enter blink_led as the Project name. Click **Next**.
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