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reisner: First Draft authored by Christopher Reisner's avatar Christopher Reisner
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getting-started-basys3.md
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...@@ -26,11 +26,11 @@ This section explains how to generate the FPGA hardware bitstream using the Xili ...@@ -26,11 +26,11 @@ This section explains how to generate the FPGA hardware bitstream using the Xili
### 5.2.1 Building the Bitstream ### 5.2.1 Building the Bitstream
~~1. Launch Vivado:~~ __1. Launch Vivado:__**
+ select **Start > All Programs > Xilinx Design Tools > Vivado 2015.4 > Vivado 2015.4** + select **Start > All Programs > Xilinx Design Tools > Vivado 2015.4 > Vivado 2015.4**
~~2. Create new Project~~ __2. Create new Project__**
Click on the **Create New Project** button in the quick start menu. Click **Next**. Enter blink_led as the Project name. Click **Next**. Click on the **Create New Project** button in the quick start menu. Click **Next**. Enter blink_led as the Project name. Click **Next**.
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