getting-started-basys3.md

@@ -26,11 +26,11 @@ This section explains how to generate the FPGA hardware bitstream using the Xili
 
 ### 5.2.1  Building the Bitstream
 
-~~1. Launch Vivado:~~
+__1. Launch Vivado:__**
 
 + select **Start > All Programs > Xilinx Design Tools > Vivado 2015.4 > Vivado 2015.4**
 
-~~2. Create new Project~~
+__2. Create new Project__**
 
 Click on the **Create New Project** button in the quick start menu. Click **Next**.  Enter blink_led as the Project name. Click **Next**.